Mods / puzzleThe Signal State mods
The Signal State puzzle mods
Everything filed under puzzle by its own author, ordered by how much it is used.
113 puzzle mods
- Dec to Hexby klvsrsSRC1 is random integer between 0 to 100 Convert SRC1 to 2 digit hex e.g. SRC1 = 100 hex= 64 expected output OUT1 = 6 OUT0 = 4967 downloadsupdated 5 y ago
- Slew Limiterby KaraidonConstruct a slew limiter. When SRC 1 outputs 100 volts, output an increasing voltage signal to OUT 1. When SRC 2 outputs 0 volts, output a decreasing voltage signal to OUT 1. The signal increases by 20 volts and decreases by 15 volts for each timestep.447 downloadsupdated 5 y ago
- cpuby chip :)you see, we've been getting along ok with hand crafting solutions to every single problem, but frankly its just inconvinent. we were hoping you could design a programmable system for data manipulation, so we don't have to re-wire our machine each and every time.392 downloadsupdated 4 y ago
- Binary Counterby KaraidonImplement a 3 bit binary counter, with OUT 1 as the least significant bit and OUT 3 as the most significant bit. Increment the counter whenever SRC 1 outputs 100 volts.285 downloadsupdated 5 y ago
- 华容道by Hotkelp269 downloadsupdated 4 y ago
- Quartz watchby gotanThese quartzes oscillate with 32768 Hz, that's 2^15 Hz. We need that frequency trimmed down to 1 Hz, so half it 15 times. We need a prototype for just one of these frequency dividers, chaining 15 of them isn't the problem. But to fit that into a watch we have some space restrictions, and also the...230 downloadsupdated 5 y ago
- 九九乘法表by dinoper209 downloadsupdated 2 y ago
- Serial to decby KalleConvert the serial bit stream to decimal, when SRC2 is 100, output the decimal value.188 downloadsupdated 5 y ago
- Sweet Child O' Mineby AlimenConnect SRC1 to OUT1 directly to play the music. Trying to play the intro of all-time classic "Sweet Child O' Mine" from Guns N' Roses on the synth, but it doesn't sound like that at all :-P Anyway, just trying to have some fun.174 downloadsupdated 4 y ago
- Medianby gotanSignals 1-3 are random values between -50 and 50. Output the median (middle value) of the three signals. After you found a solution, maybe try another one.164 downloadsupdated 5 y ago
- Single-Digit Multiplicationby isaac.wass (aaaaaaaa)Multiply the two inputs and then output.131 downloadsupdated 5 y ago
- Heat pumpby ShinobuOn start when you get High signal on SRC1 start adding 25 to OUT1, On next High signal start subtracting 25 from OUT1. Change between this two operation whenever there is High signal on SRC1. When you get 100 on OUT1 then send 100 on OUT2122 downloadsupdated 5 y ago
- Moving averageby gotanWe want to filter high frequency noise from a low frequency signal. The filter should output the average of the most recent 8 time steps (including this one). To simplify matters the signal is assumed to be zero for time steps before the start (i.e. out[1]=in[1]/8). Implement the filter: in=0 for...121 downloadsupdated 5 y ago
- Lighthouseby gotanOur lighthouse is listed in nautical charts with a light pattern alternating between a long 4-second signal and a shorter 2-second signal. The signals are separated by pauses of 3 seconds (each step counts as 1 second). We need a circuit to generate the pattern. Output a repeating pattern: 4 x On...115 downloadsupdated 5 y ago
- anti—maxby 76561199188170333using max to make min.112 downloadsupdated 4 y ago
- Clock implementationby mr accidentSRC1 is random non-repeating noise. Output 100 and 0, alternating every step. Stateful modules (Clock, S&H, Delay, etc.) are not available. This puzzle has elements which depend on module order. That behavior can potentially stop working in future updates.104 downloadsupdated 5 y ago
- Engine Stabilizerby TrobbySend (SRC1-Old SRC1) to OUT1. Old SRC1 is the value of SRC1 from the previous tick. The zeroth tick has a value of 0. Input values are clamped to 0-100.103 downloadsupdated 5 y ago
- Fibonacciby MrMeepsonOutput the sum of the current value of OUT1 and the previous value of OUT1. The first 3 values should be 0,1,1.98 downloadsupdated 4 y ago
- Divide by 7by gotanOutput the input divided by 7, rounded to the nearest integer. Input values range from 0 to 100, first simply ascending, then a few randoms for good measure.96 downloadsupdated 5 y ago
- Find the missing Numberby Monotof1The 3 SRCs provide multiples of 10 from 10 to 100. In each timesteps the current SRC values combined with the SRC value from the previous 2 timesteps form a set of 9 unique numbers from [10,20,...90,100]. Output the missing number that would complete the set of all 10 possible values. For the fir...96 downloadsupdated 4 y ago
- Rising edge detectorby LiddieSrc 1 will give a randomized signal that can either be 100 or 0. Out 1 recives 100 if Src 1 switches for a 0 to 100. Out 1 will recive a 0 if this is not the case91 downloadsupdated 5 y ago
- Tenfold Boostby isaac.wass (aaaaaaaa)Multiply the input by 10 and output.88 downloadsupdated 5 y ago
- JK Flip Flop JK触发器by 76561198416943936Design a JK Flip Flop using Logic gates, VCA and signal delay. src1 represent input J, src2 represent input K, out1 represent output Q. 使用逻辑门，VCA，信号延迟器制作JK触发器。src1为J输入，src2为K输入，out1为Q输出。 J,K,Q的关系为： J K Qnext 0 0 Qprev 0 100 0 100 0 100 100 100 Qprev`85 downloadsupdated 3 y ago
- 位数显示器by 76561198419793512SRC1会输出0-100的随机电压值 将SRC1电压值的个位数输出到OUT3 将SRC1电压值的十位数输出到OUT2 将SRC1电压值的百位数输出到OUT184 downloadsupdated 3 y ago
- 差分信号干扰消除by 76561198926404425差分信号，是指强度相同，符号相反的一对信号。当差分信号受到干扰时，两个信号会同时增加或减少相同的强度。 SRC1和SRC2是一对受到干扰的差分信号源。将消除干扰后的差分信号发送到OUT1和OUT2。84 downloadsupdated 3 y ago
- Polyrhythm Clock Switchby Kusane HexakuWhen SRC 1 is 20, send 20 to OUT every 2 intervals. When SRC 2 is 30, send 30 to OUT every 3 intervals. When SRC 3 is 40, send 40 to OUT every 4 intervals. If multiple SRCs are active at the same time, send the sum of their values to OUT on intervals that would tick together. (e.g. if SCR 1 and 2...80 downloadsupdated 3 y ago
- Unhelpful ones' complement (v3)by gotanCalculate the ones' complemet for a 6-bit number: out = 63 - in Inputs are from the range 0 - 63 Your choice of modules is a bit limited though.76 downloadsupdated 5 y ago
- Sum without sumby Monotof1OUT = SRC1 + SRC2 Sum the two source values. Unfortunately we are out of summation modules. Both SRC's values are in the range [1..64]72 downloadsupdated 5 y ago
- full-adderby 76561199193321316You need make a full-adder only use Not gate and VAC. When there is no input,Out 1 = 0,Out2 = 0 When there is one input,Out1 = 1,Out2 = 0 When there is two input,Out1 = 0,Out2 = 1 When there is three input,Out1 = 1,Out2 =172 downloadsupdated 5 y ago
- Bouncing Ballby Monotof1Simulate a bouncing ball in a vacuum. It starts at height -100 with an upwards velocity of 27 units/timestep. The gravitational acceleration is 2 units/timestep². When bouncing off the ground at -100 the ball retains 90% of its velocity (rounded). This would be roughly equivalent to the bounce be...72 downloadsupdated 4 y ago
- decimal to binaryby 76561199141193919SRC1 ranges from 0 to 15 output SRC1 as a 4 bit binary number DST1 is the smallest bit70 downloadsupdated 3 y ago
- Cash Register - Processor (v1.1)by SukasaWe dug out these old cash registers from a bunker a few days ago. While we don't really need to measure cash, they do make nice calculators. Unfortunately, most of them are damaged and we could only assemble a single working unit. Based on this voltage trace, can you recreate the parts of these r...65 downloadsupdated 5 y ago
- half-adderby KillDozerAdd SOURCE1 to SOURCE2 SUM to OUT1 CARRY to OUT265 downloadsupdated 5 y ago
- Squaresby gotanCalculate the square of the input, divided by 100, rounded to the nearest integer. out = (in x in) / 100. Input values range from 0 to 100.63 downloadsupdated 5 y ago
- USB信号转换by 76561198926404425在通常的电子电路中，我们用高电平(100V)代表1，低电平(0V)代表0。但在USB信号传输中，以信号改变代表0，信号不变代表1。 SRC1是一个随机二进制信号源，以100V代表1，0V代表0。 OUT1接受一个处理后的信号，以当前时刻信号与上一时刻不同代表1，与上一时刻相同代表0。61 downloadsupdated 3 y ago
- Blinkenlightsby gotanThis is just a little demonstrator. Just connect the input to the leftmost split and the rightmost splits to outputs. Channel counts should be set to 3,4,460 downloadsupdated 5 y ago
- Fast Memoryby Monotof1Intended solution uses sub-ticks! Implement memory that can write and read in the same cycle. SRC1 is the write data input SRC2 is the write address SRC3 is the read address OUT1 is the read data output60 downloadsupdated 5 y ago
- Sum of 6 valuesby Monotof1Seems simple but is not. Sum the current 3 source values with the 3 source values from the previous cycle. OUT1=SCR1(t)+SCR2(t)+SCR3(t)+ SCR1(t-1)+SCR2(t-1)+SCR3(t-1) All sources and the output are [-100..100] For easier analysis, here is the full SRC and OUT data as csv:59 downloadsupdated 5 y ago
- sin(x)by Monotof1OUT ≈ 100*sin(x*π/78) Provide a scaled sinus wave. x is the timestep - 1. OUT values are rounded to the nearest integer.58 downloadsupdated 5 y ago
- Min and Max of the last 8 valuesby Monotof1Intended solution uses sub-ticks! OUT1 shall be the minimum of the last 8 values from SRC1. OUT2 shall be the maximum of the last 8 values from SRC1. Only one min and one max module is available.57 downloadsupdated 5 y ago
- Shell gameby gotanFour shells are shuffled. A pea is hidden under shell 1 at the start of a game. The shells are shuffled several rounds. Each round the shells from positions 1-4 are moved to new positions given by input 1-4. Predict the pea position at the end of each game, (all inputs zero).57 downloadsupdated 5 y ago
- full-adder（NO VAC）by 76561199193321316You need make a full-adder only use Not gate． When there is no input,Out 1 = 0,Out2 = 0 When there is one input,Out1 = 1,Out2 = 0 When there is two input,Out1 = 0,Out2 = 1 When there is three input,Out1 = 1,Out2 =157 downloadsupdated 5 y ago
- Odd one outby danatron1SRC 1, 2, 3, and 4 are random values. 3 of the SRC inputs sum to 200. send the one that isn't part of that sum to OUT 1. Only 3 module types allowed!55 downloadsupdated 3 y ago
- PingPongSwitchby 76561198420131570the topic is very simple SCR1 is a button OUT1 is a LED lamp OUT1 light comes on(out 100) when the button is first pressed OUT1 light goes out(out 0) when the button is second pressed cycle54 downloadsupdated 5 y ago
- Morse decoderby KalleSRC1 is a stream of coded decimals in range 1 to 9 1 clock cycle = . 3 clock cycles = - 1 .---- 2 ..--- 3 ...-- 4 ....- 5 ..... 6 -.... 7 --... 8 ---.. 9 ----.54 downloadsupdated 5 y ago
- Binary reverseby Monotof1SRC is the decimal representation of a 6 digit binary number. Set the output to the decimal representation of the digit-wise reverse of that binary number. eg. If SRC = 11 = 001011 -> OUT = 110100 = 5254 downloadsupdated 5 y ago
- Integrator with carryby KazitorKeep a running total of the input, going beyond 100. OUT 1 takes the two most significant digits of the sum. OUT 2 takes the two least significant digits. For example, if the current total is 1205: OUT 1 = 12 OUT 2 = 554 downloadsupdated 2 y ago
- 与门的重新设计by 76561198419793512重新构建与门，但这次只有或门和非门54 downloadsupdated 3 y ago